| 摘要 |
<p>The invention relates to a semiconductor memory device including a plurality of memory cells (10); a word line (WLO) connected to the plurality of memory cells (10);a boosted voltage generating circuit (14) which generates a constant boosted potential (VPP) higher than a power-supply potential (VCC); a level-shiftig circuit (15) which level-shifts a precharge signal (PRCH) using the power-supply potential (VCC) to a boosted precharge signal (PRCH') using the constant boosted potential (VPP); a decoder circuit having address signal input terminals to which address signals (A0, A1, AK) are inputted; a circuit having an inverter circuit (30-0, 18-0), a P-channel transistor (28-0) and an input terminal, the inverter circuit (30-0, 18-0) comprising an input terminal connected to the output terminal of the decoder circuit (13-0) and an output terminal; and a word line driving circuit (11-0) which drives the word (WL0) in accordance with a potential at the output terminal of the circuit. <IMAGE></p> |
