发明名称 CMOS level detection circuit with hysteresis having disable/enable function and method
摘要 A level detection circuit, such as a Schmitt trigger circuit, has an input threshold voltage which varies depending upon the detection circuit output. The circuit includes a level detection stage, circuitry for switching the level detection stage between an active and a standby mode and a storage device for storing data indicative of the input threshold voltage when the level detection stage is in the standby mode and for controlling the level detection stage using the stored data so that the stage will retain the same input threshold voltage that existed when the level detection stage was switched to the standby mode.
申请公布号 US6046617(A) 申请公布日期 2000.04.04
申请号 US19980104765 申请日期 1998.06.25
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 HOELD, WOLFGANG K.
分类号 H03K3/356;(IPC1-7):H03K3/356 主分类号 H03K3/356
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