| 摘要 |
After formation of the storage poly in a stacked capacitor DRAM, the oxide 1 layer is partially etched to leave a thick oxide deposition in the area of the future bit line contact, upon which the cell poly is deposited, followed by oxide 2 and then a poly or nitride layer. A mask and etch process forms the bit line contact region through the cell poly, then a thin oxide is deposited and etched along with the oxide 1 to form cell poly spacers that don't close off the active area. The poly or nitride on top of the oxide 2 forms a hard mask that allows the spacers to travel down the side walls of the contact region creating a contact region that is wider at the top than bottom, facilitating metalization.
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