发明名称 Sense amplifier circuit
摘要 A sense amplifier, which is intended to reduce the output response time after it has received a small voltage difference until it delivers amplified output signals, consists of a latch circuit made up of a pair of CMOS inverters, a pair of NMOS transistors connected in parallel to the latch circuit, and a current source connected in series to the latch circuit and NMOS transistor pair. The NMOS transistors amplify a small voltage difference of input signals, and the inverters of the latch circuit further amplify the resulting voltage difference to produce the output signals. Based on is a small voltage difference of input signals being amplified in two stages and the amplifying circuit being a 2-stage serial connection of the current source and the NMOS transistor or CMOS inverter, the delay time of output response can be reduced.
申请公布号 US6046609(A) 申请公布日期 2000.04.04
申请号 US19980188369 申请日期 1998.11.10
申请人 HITACHI, LTD.;HITACHI ULSI ENGINEERING CORP. 发明人 TOYOSHIMA, HIROSHI;HARADA, MASASHIGE;NAGANO, TOMOHIRO;NISHIO, YOJI;HIRAISHI, ATSUSHI;KOMIYAJI, KUNIHIRO;YAHATA, HIDEHARU;FUKUI, KENICHI;ZUSHI, HIROFUMI;SONODA, TAKAHIRO;KAWACHINO, HARUKO;MORITA, SADAYUKI
分类号 G11C11/419;G11C7/06;G11C11/409;(IPC1-7):G11C7/06 主分类号 G11C11/419
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