| 摘要 |
A dither circuit for reproducing multicolor data includes a latch for receiving 8 input data bits and a clock signal, and for separating the 8 input data bits into high 7 bits and a low bit; a frame rate generator for receiving a horizontal sync signal, a vertical sync signal and a clock signal, and for generating a frame rate bit, wherein the frame rate bit is toggled according to each cycle of the vertical sync signal; a frame rate controller for receiving the low bit from the latch and the frame rate bit from the frame rate generator, and generating a frame data; and an adder for receiving the frame data from the frame rate controller and the high 7 bits from the latch, and for generating 7 output data bits.
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