发明名称 |
SIGNAL PROCESSING UNIT AND ITS CONTROL METHOD |
摘要 |
PROBLEM TO BE SOLVED: To execute processing efficiently without degrading processing capability of each circuit even in the case that image data with various resolutions are processed accompanying high resolution processing of the image data. SOLUTION: A memory controller 22 gives an acknowledgement signal in time division to each circuit within a range of supply of image data depending on a limit of a frequency band of an image data bus 33 and controls each circuit so that each circuit can conduct prescribed processing. That is, the memory controller 22 accesses data each circuit in real time defacto to write the image data from each circuit to an image memory 32 or to read the image data in the image memory 32 and to give the data to each circuit.
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申请公布号 |
JP2000092375(A) |
申请公布日期 |
2000.03.31 |
申请号 |
JP19980331615 |
申请日期 |
1998.11.20 |
申请人 |
SONY CORP |
发明人 |
TAKEZAWA MASAYUKI;MIZUTANI YOICHI;MATSUMOTO HIDEKI |
分类号 |
H04N5/225;H04N5/232;H04N5/765;H04N5/77;H04N5/907;H04N9/804;(IPC1-7):H04N5/232 |
主分类号 |
H04N5/225 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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