| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the load of software processing at the time of executing high speed communication and interruption processing following the communication. SOLUTION: At the time of initializing a microcomputer, reference data A to C consisting of eight bits for executing interruption processing are previously stored in respective registers 11 to 13. Eight-bit data are serially communicated from a transmitting side to a receiving side and successively stored in an FIFO memory 10. When a value written in the memory 10 coincides with any one of the reference data A to C stored in the registers 12 to 14, the value of a counter 21 is increased by a prescribed number and interruption processing corresponding to the value of the counter 21 is executed.</p> |
