发明名称 LINEAR SURFACE MEMORY FOR SPATIALLY TILED ALGORITHM/ MECHANISM
摘要 PROBLEM TO BE SOLVED: To efficiently store data in a memory unit by constituting a device so as to decrease the number of page breaks when exchanging data from a memory. SOLUTION: Polygons A and B are linearly rasterized while using data from a memory 70, for example, for decreasing the number of page breaks to occur in the case of rasterizing a polygon. As a result of tiled configuration concerning pages in the memory 70, the page breaks occur caused by just a little scan lines and it is clearly a contrast with conventional procedures. Concerning the polygon A, for example, any page break does not occur on a scan line 1-6 at all and the first page break occurs between scan line segments 6 and 7. The combination of tiled memory configuration of the polygon A and its linear rasterizing causes page breaks totally for 27 pages, and while rasterizing the entire polygon, just one page break occurs between scan lines 9 and 10.
申请公布号 JP2000090280(A) 申请公布日期 2000.03.31
申请号 JP19990130467 申请日期 1999.04.01
申请人 HARTOG SCOTT;MANTOR MICHAEL;JOHN AUSTIN CARRY;PIAZZA THOMAS A;TAYLOR RALPH CLAYTON;RADECKI MATTHEW 发明人 HARTOG SCOTT;MANTOR MICHAEL;JOHN AUSTIN CARRY;PIAZZA THOMAS A;TAYLOR RALPH CLAYTON;RADECKI MATTHEW
分类号 G06F12/00;G06F12/02;G06T1/60;G06T11/20;G06T11/40;G11C7/10;(IPC1-7):G06T11/40 主分类号 G06F12/00
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