发明名称 OUTPUT BUFFER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain an output buffer circuit that suppresses noise and increases an output speed. SOLUTION: This output buffer circuit is provided with a transfer gate 1, a transfer gate 2 whose drain is connected to a source of the transfer gate 1, a gate circuit 5 that is connected to the gates of the transfer gates 1, 2 via resistors 3, 4 respectively, receives an output signal by an input terminal and selectively gives this output signal to the gates of the transfer gates 1, 2, a data output line 6 connected to a connecting point between the transfer gates 1, 2, a common discharge line 12, a comparison detection circuit that compares a voltage level of (N-1) -th time output data stored in the data output line 6 with a voltage level of an N-th time output signal at the input terminal of the gate circuit 5 and generates a voltage level difference detection signal when the voltage levels differ from each other and a connection circuit that connects the data output line 6 to the common discharge line 12 when receiving the voltage level difference detection signal.
申请公布号 JP2000091903(A) 申请公布日期 2000.03.31
申请号 JP19980263219 申请日期 1998.09.17
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 NAKAMURA MASAAKI
分类号 G11C11/417;H03K19/0175;(IPC1-7):H03K19/017 主分类号 G11C11/417
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