| 摘要 |
PROBLEM TO BE SOLVED: To enhance performance of all reception terminal systems by dynamically changing access priority to an image drawing memory, based on information from a CPU and a data processing circuit so as to efficiently distribute an access right of each circuit to a common memory. SOLUTION: A priority circuit 12 accepts each read/write request at its RS latch. Registers are connected to a main bus and can be written in at any time by a CPU 2. A higher value is set to each register for each circuit with higher priority and a lower value is set to each register for each circuit with lower priority, in matching with the priority of each circuit. A computing element subtracts the remaining buffer capacity of each circuit accessing an image drawing memory 14 from the value set to each register, so that the priority of a register is set lower when the remaining buffer capacity is high, even when the register is of higher priority. Thus in this way, the priority decided by the priority circuit 12 is changed successively by taking the remaining capacity of the buffer storing data in each access circuit into account as an arithmetic value. |
