SEMICONDUCTOR DEVICE HAVING PRE-REPAIR TEST MODE

摘要

PROBLEM TO BE SOLVED: To shorten a time required for the AC parameter test of a memory chip by generating an error-address detecting signal in response to a pre-repair test-mode test control signal, storing data from the outside in a memory cell in response to the error-address detecting signal and a read control signal and retrieving data stored in the memory cell. SOLUTION: An error memory cell can be generated during the preparation of a memory cell array, and an address path 106 transmits an input address designating a memory cell accessed from the outside to a memory cell 102. An error detector 104 detects an error address specifying the error memory cell from the input address for generating an error-address detecting signal FA in response to a pre-repair test-mode test control signal, and couples the error address with a control circuit 112. The control circuit 112 retrieves data stored in the memory cell in response to a read control signal/WE.