| 摘要 |
PROBLEM TO BE SOLVED: To obtain an adding speed which is several times as fast as that of addition which requires 11 gate stages for 64 digits by employing such a method that 1-digit and 2-digit NAND carry signals of a start point is put in a NAND gate and carry signals are sent to 6-digit and 7-digit ANDpnp gates of an end point through necessary lines. SOLUTION: When one of two-digit 1 digit and 2 digits of the start point is AB=11, carry signals C and L (low voltage) are outputted from 1-digit or 2-digit NAND(1). Carry signals C and H(high voltage) are sent from a NAND gate P61(2) to the 6-digit ANDpnp gate Q(4) and 7-digit ANDpnp gate Q+1(5) of the end-point 6 digits through a C61 line (3) and the Q output is sent to an AND gate E(7) and a NOR gate N(8) through an intersection p(6). The outputs of E and N are inputted to be OR gate R(9). A Q+1 output is sent to E end N through an intersection p(10) and the output of E is inputted to R. A cut line and a Cu61 line (11) are connected to Q(4) and Q+1(5) and 11 of 2 to 5 digits, 00 generated by OR(12), and an L signal are inputted to the Cu61 line (11) through a diode di(13).
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