| 摘要 |
PROBLEM TO BE SOLVED: To make compatible the contact hole formation process (gate-SAC) of a DRAM and the contact hole formation process (L-SAC) of a logic LSI compatible in the manufacture of a semiconductor integrated circuit device having a DRAM and a logic LSI together. SOLUTION: A silicon nitride film 9 is left only at the upper part of region for forming the gate electrode 8A (a word line WL) of MISFET for the memory cell selection of a DRAM, and the silicon nitride film 9 is not left at the upper part of the gate electrode 8B of a MISFET for constituting the logic LSI and the upper part of the gate electrodes 8C and 8D for constituting the memory cell of an SRAM. Thereafter, by etching using the silicon nitride film 9 and a photoresist film 10 for a mask, the gate electrode 8A (word line WL) and the gate electrodes 8B-8D are pattern formed at the same time. |
