PLL CIRCUIT AND RADIO COMMUNICATION TERMINAL USING PLL

摘要

A PLL circuit requiring only one LPF is provided to decrease the mounting area and the number of pins and simplify its design, whereas the prior art PLL circuit requires an n number of LPFs. The PLL circuit comprises a variable-gain phase comparator (1), a mixer (2), LPPs (3), n VCOs (4-1 - 4-n), n couplers (5-1 - 5-n), and a control circuit (6) for performing the ON/OFF control of the VCO operation, and the phase difference conversion gain of the variable-gain phase comparator (1) is variable. The control circuit (6) carries out the ON/OFF control of the operation of the VCOs (4-1 - 4-n), and one of the VCOs (4-1 - 4-n) operates depending on a desired operation frequency band, while other VCOs are off. The phase difference conversion gain can be varied depending on the sensitivity of the VCOs (4-1 - 4-n), resulting in the required number of LPFs reduced to one.