发明名称 |
Buffer circuit, memory device, and integrated circuit for receiving digital signals |
摘要 |
A buffer circuit (60) that includes a current source (74) having an output, the current source to provide a substantially constant current, a first differential amplifier (62), and a second differential amplifier (66). The current from current source 74 is shared by the first (62) and second (64) differential amplifiers.
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申请公布号 |
US6044036(A) |
申请公布日期 |
2000.03.28 |
申请号 |
US19980078159 |
申请日期 |
1998.05.13 |
申请人 |
MOTOROLA, INC. |
发明人 |
FLANNAGAN, STEPHEN T.;WEIER, WILLIAM R. |
分类号 |
G11C7/10;G11C8/06;H03K17/041;(IPC1-7):G11C8/00 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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