| 摘要 |
A five transistor static random-access-memory (SRAM) cell is disclosed. The cell includes two cross-coupled inverters, each having two transistors, and a single n-channel transistor switch. The cell is programmed by first forcing the node connected between the inverters and the switch to a predefined logic state that is maintained by a p-channel transistor of an inverter, and then passing the voltage that corresponds to the logic state to be programmed. If the logic state to be programmed matches the predefined logic state, no significant charge is transferred. If the logic state to be programmed does not match the predefined logic state, then the n-channel transistor switch overpowers the p-channel transistor to change the predefined logic state.
|
