发明名称 Ballast resistors with parallel stacked NMOS transistors used to prevent secondary breakdown during ESD with 2.5 volt process transistors
摘要 Electrostatic discharge (ESD) protection is provided for NMOS pull up transistors 700A-H and 702A-H of a 5.0 volt compatible output buffer using 2.5 volt process transistors. The ESD protection includes ballast resistors 701A-H and 703A-H separating individual pairs of NMOS pull up transistors 700A-H and 702A-H from the pad and from a power supply connection NV3. The ballast resistors enable turn on of additional pairs of NMOS pull up transistors after a first pair, such as 700A,702A turns on during an ESD event to prevent secondary breakdown in the first NMOS pair. Pairs of NMOS pull up transistors are used to prevent voltages across individual NMOS transistors from exceeding a 2.7 volt maximum while still enabling the transistors to provide 5.0 volts to the pad.
申请公布号 US6043969(A) 申请公布日期 2000.03.28
申请号 US19980114718 申请日期 1998.07.13
申请人 VANTIS CORPORATION 发明人 SHARPE-GEISLER, BRADLEY A.
分类号 H01L27/02;(IPC1-7):H02H9/00 主分类号 H01L27/02
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