发明名称 FERROELECTRICS MEMORY, MANUFACTURING METHOD THEREOF, AND TESTING METHOD THEREOF
摘要 PURPOSE: A ferroelectrics memory, manufacturing method thereof, and testing method thereof is provided, which tests a margin to a reference voltage of a bitline voltage when a stored data is read from a memory cell to a bitline. CONSTITUTION: The ferroelectrics memory comprises: first and second bit lines (BLn, /BLn) to be connected to a plurality of memory cells (20, 21); a first reference cell (26) to be connected to the second bitline (/BLn) and for outputting a reference voltage to the second bitline (/BLn) when a memory cell to be connected to the first bitline (BLn) is selected; a second reference cell (27) to be connected to the first bitline (BLn) and for outputting a reference voltage to the first bitline (BLn) when a memory cell to be connected to the second bitline (/BLn) is selected; a sense amplifier (36) for amplifying an electric potential between first and second bitlines (BLn, /BLn) and detecting a stored data outputted from the selected memory cell to the first bitline (BLn) or the second bitline (/BLn); and a pad (32) and a plate line driving circuit (33) for controlling first and second reference cells (26, 27) to change a reference voltage. Thereby, it is possible to detect a goods which the reliability is low.
申请公布号 KR20000016863(A) 申请公布日期 2000.03.25
申请号 KR19990016716 申请日期 1999.05.11
申请人 FUJITSU LIMITED 发明人 ONO JIKAI;YAMAJAKI HIROKAZ
分类号 G01R31/28;G11C11/22;G11C11/401;G11C14/00;G11C29/50;(IPC1-7):G11C11/22 主分类号 G01R31/28
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