发明名称 MEMORY CIRCUIT FOR CHANGING A BOOSTING RATE
摘要 PURPOSE: A memory circuit for changing a boosting rate is provided, which maintains a boosting voltage for driving a word line in a suitable range to certify a reading operation. CONSTITUTION: The memory circuit for changing a boosting rate comprises: a power voltage judging transistor (50) to be set as a certain threshold voltage and be connected to an N channel transistor (51) and a P channel transistor (52); a main booster unit (60) for responding to a driving pulse (KICK) to output a boosting signal (BOOST0) and boosting a boosting voltage terminal (VPW) through a main capacitor (C0); and a sub- booster unit (61) for responding to the driving pulse (KICK) to output a boosting signal (BOOST1) and boosting the boosting voltage terminal (VPW). Thereby, it is possible to certify the normal reading operation.
申请公布号 KR20000016834(A) 申请公布日期 2000.03.25
申请号 KR19990005499 申请日期 1999.02.19
申请人 FUJITSU LIMITED 发明人 KUROSAKI KASHIDE
分类号 G11C16/06;G11C5/14;G11C7/06;G11C8/08;G11C16/08;(IPC1-7):G11C7/06 主分类号 G11C16/06
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