发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS AND MANUFACTURING METHOD THEREFOR
摘要 PURPOSE: A semiconductor integrated circuit apparatus and manufacturing method thereof is provided, which has a static random access memory (SRAM) and a logic circuit. CONSTITUTION: The semiconductor integrated circuit apparatus comprises: logic circuits (2A-2C) such as an input/output circuit, a microprocessor (CPU); a SRAM for a cache memory having a plurality of memory cells (MC) which a 6 metal insulator semiconductor field effect transistor (MIS.FET) is arranged; a phase locked loop (PLL); and a clock pulse generator (CPG), wherein memory cells (MC) has a pair of complementary data lines (DL1, DL2), a pair of driving MIS.FET (Qd1, Qd2) to be arranged at a cross portion with a wordline (WL), a pair of load resistor MIS.FET (QL1, QL2), and a pair transmission MIS.FET (Qt1, Qt2). Thereby, it is possible to improve a static noise margin (SNM) of the SRAM.
申请公布号 KR20000017183(A) 申请公布日期 2000.03.25
申请号 KR19990032506 申请日期 1999.08.09
申请人 HITACHI. LTD. 发明人 IKEDA SHUGI;YOSHIDA YASHKO;KOJIMA MASAYUKI;SIOJAWA KENJI;KIMURA MITCHYUKI;NAKAGAWA NORIO;ISHIBASHI KOICHIRO;SIMAJAKI YASHISA;OSADA KENITCHI;WUCHIYAMA KUNIO
分类号 H01L27/11;H01L21/8239;H01L21/8244;H01L27/105;(IPC1-7):G11C11/412 主分类号 H01L27/11
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