发明名称 SEMICONDUCTOR DEVICE AND MEMORY DEVICE FOR REDUCING ELIMINATION VOLTAGE, AND METHOD FOR FORMING THEM
摘要 PURPOSE: A floating gate semiconductor device is provided to reduce an elimination voltage, and forms a shaped floating gate. CONSTITUTION: The method for forming a shaped floating gate forms a trench forming a tip on a surface of IC substrate, forms an insulation layer (354) following a form of the trench on the substrate surface, buries the trench by depositing a conductive layer on the insulation layer. When the floating gate is restricted and the trench has a floating gate bottom, the method etches the conductive layer. Thereby, EPROM having a lowered elimination voltage is manufactured, IC consumes a minimum power, an operation cost is reduced, and a size of a sub-micron IC is reduced.
申请公布号 KR20000017157(A) 申请公布日期 2000.03.25
申请号 KR19990032355 申请日期 1999.08.06
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 KHAL NITSKI ALREXANDER;BERJIMONT ALBERT
分类号 H01L21/334;H01L21/336;H01L21/8247;(IPC1-7):H01L21/334 主分类号 H01L21/334
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