摘要 |
PURPOSE: A floating gate semiconductor device is provided to reduce an elimination voltage, and forms a shaped floating gate. CONSTITUTION: The method for forming a shaped floating gate forms a trench forming a tip on a surface of IC substrate, forms an insulation layer (354) following a form of the trench on the substrate surface, buries the trench by depositing a conductive layer on the insulation layer. When the floating gate is restricted and the trench has a floating gate bottom, the method etches the conductive layer. Thereby, EPROM having a lowered elimination voltage is manufactured, IC consumes a minimum power, an operation cost is reduced, and a size of a sub-micron IC is reduced.
|