发明名称 Isolation wall between power devices
摘要 The insulating wall of p-type conductivity for separating elementary components formed in different sections of n-type semiconductor and functioning at high current densities, comprises two elementary insulating walls (63,64) separated by a portion of n-type semiconductor material which is connected to a reference potential via metallisation layers (73,74). At the first stage of production, the size of openings determined by masking for the diffusion of dopants is less than half-thickness of semiconductor substrate. At the second stage of production, highly doped regions (71,72) of type n+ are formed in contact with portion between walls on the sides of upper and lower surfaces of semiconductor substrate. The insulating wall can separate two sections of semiconductor substrate, each comprising a diode, a thyristor, or a vertical triac. The leakage current is reduced to less than 1 microampere, for currents up to 4 A.
申请公布号 EP0987751(A1) 申请公布日期 2000.03.22
申请号 EP19990410113 申请日期 1999.09.14
申请人 STMICROELECTRONICS S.A. 发明人 DUCLOS, FRANCK
分类号 H01L29/74;H01L21/74;H01L21/761;H01L21/822;H01L27/06;H01L27/08 主分类号 H01L29/74
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