发明名称 SIGNAL COMPARISON SYSTEM AND METHOD FOR IMPROVING DATA ANALYSIS BY DECIDING TRANSITION OF DATA SIGNAL TO CLOCK SIGNAL
摘要 PROBLEM TO BE SOLVED: To provide a signal comparison system which decides the transition of a data signal in connection with the transition of a clock signal, and its method. SOLUTION: This signal comparison system 20 decides whether or not an error can take place at the time of sampling of a data signal 54 by that the data signal 54 comes close to the transition of its clock signal 12 and transits. A 1st latch 56 latches the data value of the data signal 54 based on the transition of the clock signal 12. A 2nd latch 58 latches the data value of the data signal 54 based on the delayed transition of the clock signal 12. A comparing device 70 compares the values of the two latches 56 and 58 and outputs specific logical value when the two values are different. The specific logical value shows that the data signal 54 comes very close to the clock signal 12 and transits and that there is some possibility that the data value of the 1st latch 56 is not reliable. Timing errors in connection with that the data signal 54 comes close to the transition of the clock signal 12 and transits, are minimized and more reliable communication is established by setting the delay of the data signal 54 to the middle position between two delays bringing about the detection of the specific logical value.
申请公布号 JP2000083015(A) 申请公布日期 2000.03.21
申请号 JP19990044326 申请日期 1999.02.23
申请人 HEWLETT PACKARD CO <HP> 发明人 BRUCE A ERICKSON
分类号 G06F1/12;G01R31/30;G01R31/3193;G06F5/06;H04L7/02 主分类号 G06F1/12
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