| 摘要 |
PROBLEM TO BE SOLVED: To simultaneously test plural pieces of high speed memories of a time when a waveform of read out data is defined is extremely short. SOLUTION: This device is provided with a phase measuring device CP measuring phases of clocks respectively outputted from plural pieces of memories to be tested and plural variable delay circuits DY1-DY3 that delay times answering to the phases measured by this phase measuring device CP are respectively set, and comparison timing signals supplied from a timing generator TG to plural logic comparators LC are respectively imparted to the logic comparators LC through these variable delay circuits DY1-DY3. Thus, since the comparison timing signals imparted to these logic comparators LC are delayed respectively by the delay times set in the answering variable delay circuits DY1-DY3, they are made to coincide with the timing of the read-out data read out from related memories to be tested.
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