发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN VERIFICATION SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a system which verifies fast whether an LSI designed by electronic design automating technology and a test pattern of the LSI generated on the basis of CAD data at the time of development designing are proper. SOLUTION: This system consists of EDA environment for verifying the function of a designed LSI device by a device logic simulator 43, an LSI tester simulator 11 which forms a test pattern and an expected pattern on a cycle base so as to test the LSI device, a 1st memory 25 which stores the test pattern obtained by converting the test pattern by a cycle-event conversion part 22, a 2nd memory 26 which stores event-based input/output data of the LSI device obtained from a dump file 15 of the EDA environment, and a comparing synchronization part 27 which synchronizes data from both the memories by comparing them and extract output data of the LSI device from the dump file 15 corresponding to the test pattern from the LSI test simulator 11.
申请公布号 JP2000082094(A) 申请公布日期 2000.03.21
申请号 JP19990230549 申请日期 1999.08.17
申请人 ADVANTEST CORP 发明人 MATSUMURA HIDENOBU;YAMOTO HIROAKI;TAKAHASHI KOJI
分类号 G01R31/28;G01R31/3183;G06F17/50;H01L21/00 主分类号 G01R31/28
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