TIMING VERIFYING METHOD FOR DESIGNING OF LSI

摘要

PROBLEM TO BE SOLVED: To perform delay calculation precisely in a short time in consideration of the influence of crosstalk as the timing verifying method for the designing of an LSI. SOLUTION: In a circuit to be verified, a place where wires are adjacent at an interval of less than specific length and signal transition occurs to the adjacent wires at nearly the same time is estimated as a crosstalk generation place AR. For the estimated crosstalk generation place AR, the mutual inductance L1 between its wires NET1 and NET2 is calculated. The current variation rate of a node N2 of the wire NET1 is calculated and circuit equations are solved by using the calculated current variation rate and mutual inductance L1 to calculate the signal delay at a node N4 of the wire NET2.