| 摘要 |
PROBLEM TO BE SOLVED: To provide a video signal line driving circuit which can perform a good video display. SOLUTION: In the video signal line driving circuit 291 having a shift register 402 transferring a shift pulse to the next stage successively and outputting a sampling pulse SP, a timing adjusting circuit 405 is provided between this shift register 402 and a video signal selecting circuit 406. Timing control signals Vc1, reverse Vc1, Vc2, reverse Vc2 are inputted to this timing adjusting circuit 405 from an external circuit directly, sampling pulses SP", reverse SP" inputted to an analog switch SW are prescribed by this timing control signals Vc1, reverse Vc1, Vc2, reverse Vc2. Thereby, sampling pulses SP", reverse SP" being not delayed for a video signal Vd can be supplied, good video display can be obtained. |
