| 摘要 |
<p>PROBLEM TO BE SOLVED: To obtain a multiprocessor device which actualizes the fast processing of a data cache by lightening the load on a bus and the load on the data cache without requiring the write monitor processing of a cache memory. SOLUTION: The common bus terminal 11a of a CPU 11 is connected to a global common bus 15b and the bus terminal of a local cache memory 12 is connected to a global noncommon bus 15a; and the global common bus is connected to an external common memory 19b stored with common information that the CPU uses and the global noncommon bus 15a is connected to an external noncommon memory 19a stored with noncommon information that the CPU uses.</p> |
