Method for fabricating an electrostatistic discharge protection device to protect an integrated circuit

摘要

An improved method for fabricating an ESD protection device so as to avoid ESD damage to a wafer. The improved method includes simultaneously forming an internal circuit and the ESD protection device without additional photomask or other process. The improved method uses a P+ doped region to take the place of an N- doped region of an interchangeable source/drain region with a LDD structure for the ESD protection device, of which its trigger voltage is adjusted by simply varying the P+ concentration.