发明名称 |
BUFFER MECHANISM, TARGET SYSTEM DECODER AND METHOD FOR BUFFERING DATA |
摘要 |
PROBLEM TO BE SOLVED: To control feeding of data in a way of synchronizing presentation without causing data overflow and underflow in a digital television receiver. SOLUTION: A digital television receiver integrates a data basic buffer 58 to limit occurrence of under flow and overflow in order to control a data flow relating to an auxiliary data service to be presented synchronously with a video or audio program element. The data basic buffer 58 warrants reception of data within a prescribed time to conduct decoding and presentation synchronously with the video or audio program element. The data basic buffer 58 limits also a data quantity of the receiver required for caching data. A minimum capacity of the data basic buffer 58 is selected to be thrice the capacity of a nominal data access unit or thrice the data quantity received by the receiver at a maximum rate within a time when the receiver displays the video element. |
申请公布号 |
JP2000083226(A) |
申请公布日期 |
2000.03.21 |
申请号 |
JP19990226775 |
申请日期 |
1999.08.10 |
申请人 |
SHARP CORP |
发明人 |
CRINON REGIS J |
分类号 |
H04N7/26;H04N7/08;H04N7/081;H04N7/173;H04N19/00;H04N21/234;H04N21/434;H04N21/438;H04N21/44 |
主分类号 |
H04N7/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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