| 摘要 |
The interface for the optoelectronic detector is in the form of a photodiode (PHD), with a load (R50) of lower impedance. The interface comprises an impedance matching using a distributed wide band amplifier (ADL) with its input directly connected to one terminal (BA) of the detector. A bootstrap stage, comprising a field-effect transistor (T11), has its gate connected to the terminal (BA) of the detector, and its source joined to the other terminal (BK) via a capacitor (CBO) of a chosen value. The distributed amplifier comprises n cell amplifiers (A1 to An) connected between the gate line (GL) and the drain line (LD). The active circuit of the cell contains a field-effect transistor, and the passive elements are sections of the gate and the drain lines. The bootstrap stage compensates the undesirable effects of the parasitic capacitance (CPA) of the detector. The sections of the gate and the drain lines are chosen so that the characteristic impedance of one cell is lower than that of the preceding cell according to a chosen law, to obtain a progressive reduction of the characteristic impedance of the drain line for the matching to the load. The distributed amplifier (ADL) is operated in the saturation mode to avoid the limitation of low-frequency range. The input impedance of the distributed amplifier is about 125 Ohms, and that of the load about 50 Ohms. |
