| 摘要 |
A multi-port packet processor on an integrated circuit (400) provides an efficient means to interface multiple high-speed packet-based communications channels. The multi-port packet processor includes multiple port processors (410). Each port processor can include a channel interface (440) for couplin g to a respective communications channel, a channel processor (426) for processing the data packets received through the channel interface (440), an d an interprocessor communications interface (444) for providing communication between the port processors. The channel interface (440) can be designed to process data packets using a particular set of packet-based protocols. Alternatively, the channel interface (440) can be designed having programmab le controls to allow processing of data packets using a selected set, from a number of possible sets, of packet-based protocols.
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