| 摘要 |
PURPOSE: An external clock phase differential detecting circuit is provided to simplify a circuit configuration, to minimize a design area and to reduce a consumed power by detecting a phase differential between an input clock and an output clock. CONSTITUTION: An external clock phase differential detecting circuit comprises an input/output clock phase detecting part(300) and an output clock phase detecting part(200). The input/output clock phase detecting part(300) detects a phase differential between an input clock and an output clock which is capable of occurring at an input/output bus. The output clock phase detecting part(200) adjusts a phase of both the output clock and an internal clock. The input/output clock phase detecting part(300) comprises a clock phase dividing part(210), a voltage level converting part(320), and a phase differential detecting part(260). The clock phase dividing part(210) divides the input clock into plural clocks having a phase differential of 180 from each other. The voltage level converting part(320) receives the plural divided clocks to convert a voltage level of the divided clocks into a voltage level of the output clock of the clock phase dividing part. The phase differential detecting part(260) receives the output clocks from the clock phase dividing part and from the voltage level converting part, and detects a phase differential between the received clocks to output a phase compensation signal.
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