发明名称 Power on reset circuit
摘要 <p>The initialization circuit comprises a field-effect transistor (NO) that is controlled by a supply voltage (Vdd) at terminal (12), and that is connected between the ground and a current source (16). There is a node (18) for output of reset voltage (RSTO), that is connected to an integrated circuit (IC)(2). Terminal (14) of the IC is connected to the same supply voltage (Vdd). The initialization circuit controls the voltage served to the integrated circuit, and the consumed current is about 10 nA. In the second embodiment of the invention, the initialization circuit comprises an second field-effect transistor connected as a diode in series with a second current source, with the additional node connected to the gate of the first transistor. In the third embodiment, the initialization circuit comprises two additional field-effect transistors connected in series as a diode with the second current source. In a variant of the third embodiment, the initialization circuit comprises M additional field-effect transistors connected in series as a diode, for the provision of a higher reset voltage. The integrated circuit can contain the first or the second current source, and an inverter or an amplifier can be connected between the output node and the integrated circuit. The initialization circuit can be implemented as monolithic with the integrated circuit on a semiconductor substrate.</p>
申请公布号 EP0986175(A1) 申请公布日期 2000.03.15
申请号 EP19980116952 申请日期 1998.09.08
申请人 EM MICROELECTRONIC-MARIN SA 发明人 JAEGGI, HUGO
分类号 H03K17/22;(IPC1-7):H03K17/22 主分类号 H03K17/22
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