发明名称 MULTI-PROCESSOR SYSTEM
摘要 <p>Log memories (log memories 6a-6b) for recording updated history of a main memory 7 are provided. CPUs 2a-2c record the updated history of the main memory to either of the log memories and writes context thereof and content of a cache memory to the main memory at a checkpoint acquisition. The updated history of the main memory is switched from one of CPUs that has finished a checkpoint processing to other one of the log memories in which the CPUs do not use to record the updated history of the main memory. Normal processing is restarted without waiting for finishing the checkpoint acquisition of the other ones of CPUs. <IMAGE></p>
申请公布号 KR100247875(B1) 申请公布日期 2000.03.15
申请号 KR19960021798 申请日期 1996.06.17
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HOSHINA, SATOSHI;SAKAI, HIROSHI;HIRAYAMA, HIDEAKI;OHMORI, SHIGEFUMI;FUJII, TAKAHIRO;MASUBUCHI, YOSHIO
分类号 G06F15/16;G06F11/14;G06F12/08;G06F15/177;(IPC1-7):G06F11/14 主分类号 G06F15/16
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