| 摘要 |
The invention relates to a circuit arrangement with a predetermined number of group lines (WL0, ..., Wlm, BL0, ..., BLm) which are arranged at regular intervals adjacent each other on a semiconductor substrate (26) and to which a plurality of elementary electronic circuits (7) formed on the semiconductor substrate (26) and substantially identically are connected. A test circuit for checking the electronic operability of the elementary circuits (7) and/or the group lines (WL0, ..., Wlm, BL0, ..., BLm) is provided which is also integrated on the semiconductor substrate (26) of the circuit arrangement, has a switching device (30) which is associated with the group lines (WL0, ..., Wlm, BL0, ..., BLm) and is used to actuate at least one predetermined group line (W1n, BLn) by a first test signal. A further group line (W1n', Bln', n'=n-1, n'=n+1) arranged directly adjacent in relation to the predetermined group line (Wln, BLn) is actuated by a second test signal having a different test level in relation to the first test signal, and detection means (31) associated with the group lines (WL0, ..., Wlm, BL0, ..., BLm) is provided and determines an output signal derived from the group lines (W1n, BLn or W1n', BLn') which have received the first or second test signal.______________________ |
