发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To reduce a consumption current at a standby time in a semiconductor integrated circuit using a plurality of CMOS circuits using a small MOS transistor. SOLUTION: The device parameter of a switching transistor S1 is set to that the leakage current of the S1 for composing a power supply switch that is turned off at a standby time becomes smaller than the total of the sub threshold current of a p-channel of n-channel MOS in an off state of a plurality of CMOS circuits Ci. As a result, the current of a plurality of CMOS circuits C1 at a standby time becomes a small leakage current of the switching transistor S1, and not a large sub threshold current of the Ci using a small MOS. |
申请公布号 |
JP2000076854(A) |
申请公布日期 |
2000.03.14 |
申请号 |
JP19990169312 |
申请日期 |
1999.06.16 |
申请人 |
HITACHI LTD;HITACHI DEVICE ENG CO LTD |
发明人 |
KAWAHARA TAKAYUKI;KAWAJIRI YOSHIKI;AKIBA TAKESADA;HORIGUCHI SHINJI;WATABE TAKAO;KITSUKAWA GORO;KAWASE YASUSHI;TACHIBANA RIICHI;AOKI MASAKAZU |
分类号 |
G06F1/32;G11C11/407;G11C11/413;G11C27/02;H01L21/8242;H01L27/108;H03K19/00;H03K19/0948 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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