发明名称 |
METHOD FOR DESIGNATING PACKAGE PATH OF INTEGRATED CIRCUIT SIGNAL |
摘要 |
PROBLEM TO BE SOLVED: To provide a method for restricting a wire delay and a signal skew to a minimum and distribute an integrated circuit signal via an integrated circuit package layer by distributing a timing deciding signal via the integrated circuit package layer. SOLUTION: This method for reducing a signal delay and a skew in an integrated circuit comprises a) a step of driving a signal via a first connection part between an integrated circuit and an integrated circuit package layer, b) a step of distributing a signal to a second connection part between the integrated circuit and the integrated circuit package layer via a transmission line path formed in the integrated circuit package layer, c) and a step of receiving a signal to the integrated circuit via the second connection part between the integrated circuit and the integrated circuit package layer. |
申请公布号 |
JP2000077607(A) |
申请公布日期 |
2000.03.14 |
申请号 |
JP19990244951 |
申请日期 |
1999.08.31 |
申请人 |
HEWLETT PACKARD CO <HP> |
发明人 |
DAVID B HOLENBECK;WORLEY JR WILLIAM S;DAVID W QUINT;TIMOTHY L MICHARKA |
分类号 |
H01L21/822;G06F1/10;G06F17/50;H01L23/498;H01L23/64;H01L27/04 |
主分类号 |
H01L21/822 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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