发明名称 SEMICONDUCTOR MEMORY DEVICE AND ITS CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device which prevents data from being broken down and in which the reliability of an I/O masking operation is high in a block write operation by installing an auxiliary circuit so that a data bus line pair can be maintained at a power-supply potential. SOLUTION: In a semiconductor memory device, a plurality of memory cells MC1 to MCn are provided. In addition, a plurality of bit line pairs BL1, BL1B to BLn, BLnB which are connected respectively to the plurality of memory cells MC1 to MCn are provided. In addition, a word line WL which is used to fetch information from the memory cells MC1 to MCn is provided. In addition, sense amplifiers C1 to Cn which are installed respectively at the bit lune pairs BL1, BL1B to BLn, BLnB and which amplify their difference potentials are provided. In addition, a write control circuit B to which write data WD given from the outside is input is provided. In addition, a pair of data bus line pairs DB, DBB which are driven by the circuit B are provided. In addition, switching circuits 11, 21 to 1n, 2n by which potentials of the data bus line pairs DB, DBB are transmitted to the bit line pairs BL1, BL1B to BLn, BLnB are provided.
申请公布号 JP2000076846(A) 申请公布日期 2000.03.14
申请号 JP19980245443 申请日期 1998.08.31
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 TASHIRO SHINYA
分类号 G11C11/409;G11C11/401;(IPC1-7):G11C11/401 主分类号 G11C11/409
代理机构 代理人
主权项
地址