| 摘要 |
An integrated circuit (SAI0) comprises a first SOI transistor (T4) comprising a plurality of nodes, the plurality of nodes comprising a first source/drain, a second source/drain, a gate for receiving a potential to enable a conductive path between the first source/drain and the second source/drain, and a body terminal coupled to a body region disposed between the first source/drain and the second source/drain. The integrated circuit further includes a second SOI transistor (T5) comprising a plurality of nodes, the plurality of nodes comprising a first source/drain, a second source/drain, a gate for receiving a potential to enable a conductive path between the first source/drain and the second source/drain, and a body terminal coupled to a body region disposed between the first source/drain and the second source/drain. In the integrated circuit, one of the plurality of nodes of the first SOI transistor is connected to receive a first differential input signal. Moreover, a same one of the plurality of nodes of the second SOI transistor is connected to receive a second differential input signal. Lastly, the body of the first SOI transistor is connected to the body of the second SOI transistor and the bodies of the first and second SOI transistors are connected to float.
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