| 摘要 |
PROBLEM TO BE SOLVED: To provide a high-speed-synchronization semiconductor memory device provided with a dual port which improves a graphic processing speed. SOLUTION: In a high-speed-synchronization semiconductor memory device, a data input buffer 33 is synchronized with the rise edge of a first clock CLK1, it buffers data which is input through a first port DQ, and it transmits the data to a memory cell array 31. A first data output buffer 35 is synchronized with the rise edge of the first clock CLK1, it buffers data which is output from the memory cell array 31, and it outputs the data to the outside through the first port DQ. A register 36 as a storage place for data in a set amount temporarily stores data which is output from the memory cell array 31. A second data output buffer 37 is synchronized with both the rise edge and the fall edge of a second clock CLK2, it buffers data which is output from the register 36, and it outputs the data to the outside through a second port SDQ. Even when the second clock CLK2 is a clock whose cycle is different from that of the first clock CLK1 so as not to be synchronized, it can be used even in the same clock as the first clock CLK1 as the second clock.
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