发明名称 Method and apparatus for enforcing ordered execution of reads and writes across a memory interface
摘要 A memory interface is provided between a processor and a memory subsystem which is capable of multiple concurrent transactions or accesses. The interface between the processor and the memory carries read and write operations as well as "barrier" operations, where a barrier operation signals the non-reorderability of operations. In one variation, the memory interface is an interface to one or more memory mapped input/output (I/O) devices or computational devices.
申请公布号 US6038646(A) 申请公布日期 2000.03.14
申请号 US19980012882 申请日期 1998.01.23
申请人 SUN MICROSYSTEMS, INC. 发明人 SPROULL, ROBERT F.
分类号 G06F12/06;G06F12/00;G06F13/16;(IPC1-7):G06F12/00 主分类号 G06F12/06
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