| 摘要 |
PROBLEM TO BE SOLVED: To apply a delay calculation algorithm of high order which has high delay calculation precision from a stage of function design. SOLUTION: At a stage of a function level floor plan, a step 3 for selecting the driving capability of the output terminal of an undesigned function block is provided. Consequently, the input signal waveform of an inter-block wiring network can be defined and a delay calculation algorithm of high order can be applied to the delay calculation of inter-block wiring. Further, a step 7 for logically designing the undesigned function block under the restriction of the selected driving capability is provided to eliminate a timing error due to the delay calculation error of the inter-block wiring, thereby eliminating redesigning.
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