OUTPUT CONTROL SIGNAL GENERATION METHOD AND OUTPUT BUFFER CONTROL CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE AND THE SEMICONDUCTOR MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To provide an output control signal generation method and an output buffer control circuit in a semiconductor memory device for generating a normal output control signal even if an external clock is inputted at an abnormal level in the semiconductor memory device, and its semiconductor memory device. SOLUTION: An output buffer control circuit 430 that is operated by an output control signal generation method is provided with an automatic pulse generation part 433 and an output control signal generation part 431. The automatic pulse generation part inputs a wait signal LAT and generates an automatic pulse signal PRECHDQ. The output control signal generation part inputs the wait signal LAT, and generates an output control signal PTRST that is made inactive in response to the automatic pulse signal PRECHDQ while being made active in response to an output control clock CLKDQ. An output buffer 420- is enabled when an output control signal is made active and is disabled when it is made inactive, thus preventing malfunction even if an external clock CLK is inputted at an abnormal level.