发明名称 Method and apparatus for providing a memory with write enable information
摘要 A method is described for providing a memory with a serial sequence of write enable signals that are offset in time with respect to respective data received by a plurality of data inputs of the memory. A memory is also described with an array for data storage, a plurality of data input pins, and a separate pin for receiving either additional data or a serial sequence of write enable signals applicable to data received by the plurality of data input pins. The additional data that the separate pin can receive includes, for example, error detection and correction (EDC) information. A method is also described for multiplexing write enable information and error detection and correction information.
申请公布号 US6035369(A) 申请公布日期 2000.03.07
申请号 US19950545294 申请日期 1995.10.19
申请人 RAMBUS INC. 发明人 WARE, FREDERICK ABBOTT;HAMPEL, CRAIG EDWARD;STARK, DONALD CHARLES;GRIFFIN, MATTHEW MURDY
分类号 G11C11/413;G11C7/22;G11C11/401;(IPC1-7):G06F12/02 主分类号 G11C11/413
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