发明名称 MEMORY INTEGRATED CIRCUIT HAVING SERIAL OUTPUT COMPARATOR
摘要 PURPOSE: A memory integrated circuit is provided to test data of a high frequency memory integrated circuit using a low frequency testing device by comparing, coding, and generating high-speed data inwardly generated in series. CONSTITUTION: The circuit comprises a plurality of switches inputting internal data and outputting the internal data in response to a control signal, a plurality of preservers preserving outputs of the switches by respectively inputting the outputs, a comparator comparing the internal data and the outputs of the data preserves, and a data transmitter transmitting the internal data to the switches in response to an internal clock signal.
申请公布号 KR20000013043(A) 申请公布日期 2000.03.06
申请号 KR19980031692 申请日期 1998.08.04
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO, SEONG UH;KIM, HYEONG TONG
分类号 G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/00
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