CONTROL SIGNAL GENERATING CIRCUIT IN A SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A control signal generating circuit is provided to stably generate a word line control signal and a sense amplifier enable signal for use in a high speed operation. CONSTITUTION: The control signal generating circuit comprises: a block decoder for generating a block control signal in response to an address buffer signal and a control signal; a section word line driver for generating a section word line control signal in response to a main word line control signal and the block control signal; a word line control element for generating the word line control signal and the sense amplifier enable signal in response to a read enable signal and the block control signal while the signals are delayed for a predetermined time but a width of the signals is maintained in a reading operation; and a control signal generating element for generating the control signal in response to the block control signal in a writing operation while in response to the word line control signal and the block control signal in a reading operation.