BIT LINE DISCHARGE CIRCUIT IN A SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A bit line discharge circuit is provided to reduce a power consumption. CONSTITUTION: The bit line discharge circuit comprises: a memory cell array further comprising a plurality of word lines, a plurality of bit lines and virtual ground lines transposed with the word lines, and a plurality of memory cells connected to the lines; a precharge circuit for precharging the bit lines and the virtual ground lines to a predetermined voltage level during a precharge operation before reading data stored in the memory cell array; and a bit line precharge and equalize circuit for discharging the only virtual ground line corresponding to a selected memory cell during the a reading operation.