发明名称 INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To obtain an integrated circuit device that effectively interrupts supply of power in the power-down mode. SOLUTION: The integrated circuit device is provided with a NAND circuit ND1 that receives an output signal from a NAND circuit ND2 connecting to power supplies 18, 19, a PMOS transistor(TR) 26 whose source connects to the power supply 18, whose back-gate connects to the power supply 19, and whose gate connects to the NAND circuit ND1, and an NMOS TR 27 whose back-gate connects to a ground power supply 20, whose gate connects to a NOR circuit NR1 and whose source connects to the drain of the PMOS TR 26.
申请公布号 JP2000068815(A) 申请公布日期 2000.03.03
申请号 JP19980295360 申请日期 1998.10.16
申请人 MITSUBISHI ELECTRIC CORP 发明人 OKUMURA NAOTO
分类号 H03K17/687;H03K19/0175;(IPC1-7):H03K19/017 主分类号 H03K17/687
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