发明名称 DIGITAL SIGNAL PROCESSOR AS WELL AS RECORDER AND REPRODUCER
摘要 PROBLEM TO BE SOLVED: To provide a clock for decoding processing which permits the input and output of an analog signal by switching an internal clock and the clock extracted from an external stream. SOLUTION: When analog input is selected, all circuits are processed by the internal clock formed in a clock forming circuit 108. When digital input is selected, a recording signal processor 112 and a decoder 105 control a clock changeover clock 109 by the clock control signal from a microcomputer 114 and use the clock reproduced by a clock reproducing circuit 107. The clock is reproduced by the clock reproducing circuit 107 in an IF circuit 104 and, therefore, this time information is extracted and is outputted to the clock reproducing circuit 107. Even the stream from an analog output terminal 102 may be decoded by the decoder 105 by such processing and the monitor of the recorded stream may be analogically outputted and may be viewed.
申请公布号 JP2000067513(A) 申请公布日期 2000.03.03
申请号 JP19980236787 申请日期 1998.08.24
申请人 HITACHI LTD 发明人 SAITO SEIICHI;OKAMOTO HIROO
分类号 G11B20/10;G11B20/00;(IPC1-7):G11B20/00 主分类号 G11B20/10
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